April 30, 2020
Dr. G. Durga – Associate Professor
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Dr. G. Durga, Associate Professor in the Department of Electronics and Communication Engineering has over 18 years of experience in teaching. She received her B.E. (Electronics and Communication Engineering) degree, First class with Distinction from University of Madras in 2002, M.E. degree (Applied Electronics) First Class from Government College of Technology, Coimbatore, Anna University Chennai, in 2004 and Ph.D from Anna University, Chennai in 2018. Her thesis topic is “Soft Error performance of Junction and Junctionless Silicon Nanotube FET-based SRAM and Inverter Chain”. Her research interests include Nano Electronics &Nano devices, Radiation study in RF/Analog and digital circuits, VLSI circuit design and Low Power VLSI.
She has around thirty research publications in International Journals and National/International conferences. She has guided 20 projects for under graduate students and 23 projects for post graduate students. Shereceived Best Teacher award for the outstanding performance for the academic year 2012-2013. She is an active member of various professional societies. She is a Member IEEE, Life member ISTE and Life member IETE.She reviewed papers for Journal of Computational Electronics, Transactions on Device and Materials Reliability and Journal of Supercomputing.
Journals/Conferences:
International Journals | International Conferences |
8 | 22 |
Projects:
S.No | Title | Sponsoring agency/Status | Amount Rs. in Lakh |
1 | Hand held device for women safety | SSN Trust/Completed | 0.15 |
2 | Reconfigurable FET in the design of CMOS circuits | SSN Trust/Ongoing | 2.35 |
Publications:
- Durga, Susanta Kumar Pal, R. Srinivasan, “Reconfigurable FET Based Tunable Ring Oscillator and its Single Event Effect Performance”Journal of Circuits, Systems and Computers, Vol.31 (1-18),2022, IF: 1.278 (Thomson Reuters).
- Rama Krishna Reddy Venna, G. Durga, “Design of novel area efficient coplanar reversible arithmetic and logic unit with an energy estimation in quantum dot cellular automata”, The Journal of Supercomputing, Vol.79,2022, IF: 2.557 (Thomson Reuters).
- Vinodhkumar, G. Durga, S. Muthumanickam, “Numerical Study on SEU Performance of Strain Engineered 6T- SRAM Cells”, Journal of Circuits, Systems and Computers, Vol.31 (1-18),2021, IF: 1.278 (Thomson Reuters)
- Durga, R. Srinivasan, “Soft error study on junctionless silicon nanotube FET based 6T SRAM cell”, IOP Science: Journal of Physics, vol.1706, 2020 (Scopus indexed)
- Durga, R.Srinivasan, “Silicon nanotube SRAM and its SEU reliability”, Superlattices and Microstructures, March 2017, Vol.106, pp: 129-138, ISSN 0749-6036, IF:2.117 (Thomson Reuters)
- Durga, R. Srinivasan, “SET analysis of silicon nanotube FET”, Journal of Computational Electronics, April 2017, DOI: 10.1007/s10825-017-0982-y, ISSN: 1569-8025 (Print) 1572-8137 (Online), IF:1.104 (Thomson Reuters).
- Durga, M.MerylRino, “Performance Analysis of Single Event Double Upset Immune D and S-R Flip flops”, WSEAS Transactions on Electronics, ISSN / E-ISSN: 1109-9445 / 2415-1513, Volume 9, 2018, Art. #7, pp. 61-68.
- Suresh Durai, Durga Jayakumar, Srinivasn Raj, AnbarasuManivannan, “Understanding the impact of Heavy-Ion Induced Single Event Upsets in Phase Change Memory”, of European Phase Change and Ovonic Symposium (EPCOS 2018), Catania, Italy, held during 23 – 25 September 2018, pp: 155-157.
- Durga, V.Balamurugan, R. Srinivasan published a paper titled “ Single Event Transient Analysis on Junctionless Silicon Nanotube Field Effect Transistor”, in IEEE International Conference on Information Communication & Embedded Systems (ICICES 2017), Feb. 23 – 24, 2017, held at Chennai, India.
- Bharathi, G. Durga, N.Vinodh Kumar, K.K.Nagarajan and R.Srinivasan “Performance Optimization of Bulk JunctionlessFinFETs through Work Function Engineering ” in IEEE International Conference on “Circuits, Power and Computing Technologies (ICCPCT 2014)” pp : 1291 – 1295, March 20-21, 2014.
- Chandrasekar and G. Durga “Implementation of Hough Transform for Image Processing Applications” in IEEE International Conference on “Communication and Signal Processing” pp: 1060 – 1064, April 3-5, 2014.
- Archana and G. Durga “Design of Low Power and High Speed Ripple Carry Adder” in IEEE International Conference on “Communication and Signal Processing” pp: 544 – 548, April 3-5, 2014.
- Suriya and G. Durga “Design of 50 – 75 GHz V – band Low Power and High Gain Down – Conversion Mixer” in IEEE International Conference on “Communication and Signal Processing” pp: 575 – 579, April 3-5, 2014.
Google Scholar citation:
https://scholar.google.co.in/citations?user=T-szbZYAAAAJ&hl=en
LinkedIn: