Dr. Premanand Chandramani

premanand

Professor
Dr. Premanand Chandramani B.E., M.S., Ph.D

Email:premanandc@ssn.edu.in

Extn: 390

 

Education:
Doctorate of Philosophy in Computer Engineering
, Spring 2004|
University of Delaware, Newark, DE 19716

Thesis Title: “Design of Multi-Gigabit Optical Network Interface Card and Layout Methodology for High-Voltage drivers for Modulators and MEMS devices”

Master of Science in Electrical Engineering, Aug 1999
University of North Carolina at Charlotte, Charlotte, NC 28213

Thesis Title: “A High-Speed CMOS scanner chip to be flip-chip bonded with MQ Modulators”

Bachelor of Science in Electrical and Electronics Engineering, May 1995.
Annamalai University, Chidambaram, India, 608002.

Teaching position and Ranks held:

 July 2009 – Present      Professor -   SSN College of Engineering, Chennai, TN, India

Aug 2004 – Jun 2009  Assistant Professor -    San Diego State University, San Diego, CA

Aug 2003 – Jul 2004   Assistant Professor -      University of North Carolina at Charlotte, Charlotte, NC

Relevant Experience

 

Jul 2009 – Present       Professor, SSN College of Engineering, Chennai, TN, India

  • CMOS RF Microelectronic circuits for radiation mitigation
  • Radiation tolerant Data converters
  • Sigma-delta modulators for Analog to Digital Converters
  • Demand response for Microgrids 

Aug 2004 – Jun 2009  Assistant Professor, San Diego State University, San Diego, CA

  • Design of CMOS drivers of transimpedance amplifiers for VCSELs, photodetectors and MEMS devices using AMI 0.5um process technology
  • Designing low noise amplifier for use in Ultra-Wide band (UWB) applications that will operate between 3.125GHZ up to 10.3GHz
  • Novel architectures for system-on-a-chip concept for software defined radio applications using embedded processors within FPGAs

Sept 1999 – July 2003 Graduate research Assistant, Advisor: Dr.FouadKiamilev -        University of Delaware, Newark, DE

  • Designed a Xilinx’s XCV1000 VIRTEX FPGA based Optical Network Interface Card with 12-channel gigabit parallel optical link from Honeywell technology center and a 64bit/66MHz PCI computer interface as part of the DARPA VLSI Photonics program
  • Designed a Xilinx’s XCV1000 VIRTEX FPGA based Optical Network Interface Card with 12-channel gigabit parallel optical link from Stratos Lightwave Inc., to interface with the OSIRIS board from USC ISI as part of the DARPA PCA (Polymorphous Computing Architectures) program
  • Designed and tested a High-voltage CMOS driver IC (up to 50volts) for Avionics Counter measures application (1-D beam steering). The design uses 260K 0.8μm CMOS transistors and drives a 1-D array of up to 256 Spatial Light Modulators. The IC was designed for the DARPA STAB (Steered Agile Beams) program and fabricated in a dedicated wafer run with AMS foundry
  • Lead for the UDEL part of DARPA STAB effort with BAE systems. Duties include regular reports, sponsor presentations, project planning and communicating with other team members. Developed a foundry interface to allow for engineering wafer run outside of MOSIS service for the CMOS high-voltage driver ICs

Aug 1997 – Aug 1999  Graduate Research Assistant, Advisor: Dr.FouadKiamilev -     University of North Carolina at Charlotte, Charlotte, NC

  • Designed a CMOS IC for 1-D scanning applications (such as Ultra high-speed laser printing). The design uses 400K 0.5μm CMOS transistors and drives up to 768 optical modulators
  • Co-designed a CMOS chip for flip-chip integration of 2-D arrays of VCSELs and Photodetectors. The chip was used for DARPA demonstration of Free Space Optical Interconnection (FSOI)

Industrial experience 

Jan 2001 – Aug 2002   Investing partner and Design Consultant

Digital Systems Innovations, LLC, DE, USA

  • During this period I was the lead on the design team that developed “Cost-effective FPGA based test pattern generator and analyzer using a PCI interface” for 2.5Gbps per channel, 4-channel parallel optical data links

May 1997 – Aug 1997  Research Consultant

Lucent Technologies, Bell Labs, Holmdel, NJ

  • Performed layout and verification for a CMOS test chip with research circuit designs from Bell laboratories
  • Responsible for aggregation and verification of a Multi project CMOS wafer run containing circuit designs from 20 research groups 

Proposals and grants:

1)    Principle Investigator (PI), “Development of Successive Approximation Analog to Digital Converter (SAR ADC) for Ultra-Wideband (UWB) Applications”,Research Grant from the Standing Research Committee, Sri SivasubramaniyaNadar College of Engineering, India, July 2010 (Three Year project ending inJuly 2013). Funded Grant Amount: Rs.8,32,132/- 

Professional Memberships

  • The Institute of Electrical and Electronics Engineers (IEEE)
  • Laser and Electro Optics Society (LEOS)

Publications- Google Scholar Citation

https://scholar.google.com/citations?user=P7X2CDgAAAAJ&hl=en