Dr. R. Srinivasan

Dr. R. Srinivasan Ph.D

Email: srinivasanr@ssn.edu.in
Extn: 403



R Srinivasan obtained his MS (By research) degree from the department of electrical engineering, Indian Institute of Technology, Madras in the year 1998. His MS research thesis was on quantum well lasers and quantum well infrared photo-detectors. He received his Ph.D. degree from the department of electrical communication engineering, Indian Institute of Science, Bangalore in the year 2007. His dissertation was on RF CMOS device engineering and its performance analysis. To his credit he has 26 journal papers and 41 conference papers.

He has experience both in industry as well as in academics. After happy years in industry, he joined as a faculty member in the department of Information Technology, SSN College of Engineering in December 2007.

His research interests include VLSI, nano-scale transistors, micro/nano-electronics and analog circuits.

He has executed two projects of worth Rs. 21.8 lakhs and 31 Lakhs sanctioned from DST, Govt. of India, and DRDO, Govt. of India, respectively. The first project was aimed to study the effect of process variational effects in nano-scale MOSFETs using TCAD simulations, and the second project was aimed to study the radiation effects on novel devices-based SRAM cells.

 JOURNAL LIST – UPTO 2017(March)

1. P R Vaya and R Srinivasan, Simulation Study of Znte/CdZnTe based quantum well lasers, Elsevier Material Science and Engineering B, Vol 57, 1, pp 71-75, Dec 1998.

2. R Srinivasan and Navakanta Bhat, Scaling Characteristics of fNQS and ft in NMOSFETS with and without Supply Voltage Scaling, Journal of Indian Institute of Science, Vol 85, Aug 2005.

3. R Srinivasan and Navakanta Bhat, Scaling Characteristics of fNQS and ft in NMOSFETS with Uniform and Non-uniform Channel Doping, International Journal of Electronics, Taylor and Francis Group, Vol 92, No 12, Dec 2005.

4. R Srinivasan and Navakanta Bhat, Effect of Gate-Drain/Source Overlap on Noise in 90 nm NMOSFETS, Journal of Applied Physics, Vol 99, No 8,  2006.

5. R.Srinivasan and Navakanta Bhat, “Optimisation of Gate-Drain/Source Overlap on Noise in 90 nm NMOSFETS for Low Noise Amplifier Performance”, Journal of Low Power Electronics, Vol.4, No.2,pp.240-246,2008.

6. R.Srinivasan and Arup Ratan Saha, “Effect of STI, DSL and SMT on fT and noise-figure in 30 nm gate length NMOSFET”, International Journal of Electronics,Vol.95,No.10,       pp.1103-1109,2008.

7. V.N.Ramakrishnan and R.Srinivasan, “Soft Error Study in Double gated FinFET-Based SRAM Cells with Simultaneous and Independent Driven Gates”,  Microelectronics Journal (Elsevier Publisher),Vol.43,pp.888-893,2012.

8. B.Lakshmi and R.Srinivasan, “Investigation of ft and non-quasi-static delay in conventional and junctionless multigate  transistors using tcad simulations”, ARPN journal of engineering and applied sciences , vol. 7, No. 7,July2012.

9. K.K.Nagarajan, N.Vinodhkumar and R.Srinivasan, “Optimization of Gate – Source/Drain Underlap on 30 nm Gate Length FinFET Based LNA Using TCAD Simulations”, WSEAS Transactions On Circuits And Systems,Vol 11,No.11, pp.361-370,  November 2012.

10. V.N.Ramakrishnan and R.Srinivasan, “Effect of underlap and soft error performance in 30 nm FinFET-based 6T-SRAM cells with simultaneous and independent driven gates”, Journal of Computational Electronics, Vol. 12, pp.469-475,  May 2013.

11. B .Lakshmi and R.Srinivasan, “Effect of Process Parameter Variation on ft in N-Type Junctionless FETs”, Journal of Computational Electronics, Vol. 12, pp.454-459, April 2013.

12. B.Lakshmi and R.Srinivasan, “Performace Analysis of Dual Metal Gate Work function in junctionless FETs”, International Journal of Computational and   Theoretical NanoScience,Vol.10,Jun2013.

13. K.K.Nagarajan and R.Srinivasan, “Process Variation Compensation in Independently Driven Double Gate FinFET-Based 10 GHz LNA using Mixed Mode TCAD Simulations”, European Journal of Scientific Research, Vol.97,No.2,pp.263-271,February 2013.

14. K.K.Nagarajan and R.Srinivasan, “Investigation of Tunable Characteristics of Independently Driven Double Gate FinFETs in Analog/RF Domain Using TCAD Simulations”, Journal of Computational and Theoretical Nanoscience, Vol.11,  pp.821-826, March 2014.

15. D. Suresh, K.K. Nagarajan, R. Srinivasan, “Impact of process variations on input impedance and mitigation using circuit technique in FinFET-based LNA”, Journal of Semiconductors, 2015,36(4), pp.045002-6.

16. N. Vinodhkumar, Y.V.Bhuvaneshwari, K.K.Nagarajan and R.Srinivasan, “Heavy-ion irradiation study in SOI-based and bulk-based junctionless FinFETs using  3D-TCAD simulation”, Microelectronics Reliability (Elsevier Publisher), Vol.55, No.12, pp.2647-2653, December 2015.

17. N. Vinodhkumar and R.Srinivasan, “Radiation performance of planar junctionless devices and junctionless SRAMs”, Journal of Computational Electronics,Vol. 15, No.1, pp.61-66, March 2016.

18. R.Ambika, R.Srinivasan,”Performance Analysis of n-Type Junctionless Silicon Nanotube Field Effect Transistor ”, Journal of Nanoelectronics and Optoelectronics,Vol. 11, pp. 1–7, 2016(ASP Publisher).

19. R.Ambika, R.Srinivasan,”Analysis of independent gate operation in Si nano tube FET and threshold prediction model using 3D numerical simulation”, Journal of Computational Electronics, Vol.15, No.1, pp.61-66, March 2016 (Springer)

20. N.Keerthana,R.Ambika, R.Srinivasan,”Realization of Tunnel FET operation on Junctionless FET with Single Gate electrode Work function”, Journal of Nanoengineering and Nanomanufacturing , Vol. 6, pp. 1–4, 2016 (ASP Publisher).

21. Maran Ponnambalam, Vinodthkumar, R Srinivasan, Premanand Chandramani,” Phase Displacement Study in MOSFET-based Ring VCOs Due to Heavy Ion Irradiation Using 3D TCAD and Circuit Simulations”, Microelectronics Reliability (Elsevier Publisher), Vol. 65, pp. 27-34, 2016.

22. R.Ambika, N.Keerthana, R.Srinivasan,”Realization of Silicon nanotube tunneling FET on junctionless structure Using Single and Multiple Gate workfunction “, Solid-State Electronics (Elsevier Publisher), Vol. 127 (2017) 45–50.

23. G Durga, and R Srinivasan, “SET Analysis of Silicon Nanotube FET” Journal of computational electronics, Vol. 16, No. 2, 2017, 307-315.

24. G Durga, and R Srinivasan, “Silicon Nanotube SRAM and its SEU Reliability” Superlattices and Microstructures (Elsevier Publisher),  Vol. 106, 2017, 129-138.

25. Priscilla Scarlet, R Ambika and R Srinivasan, “Effect of Eccentricity on Junction and Junctionless-based Silicon Nanowire and Silicon Nanotube FETs” Superlattices and Microstructures (Elsevier Publisher), Vol. 107, 2017, 178-188.

26. R.Ambika, N.Keerthana, R.Srinivasan ,”Sensitivity of Silicon Nanotube Field Effect Transistors to Structural Process Parameters”, Journal of Nanoelectronics and Optoelectronics, 2017 (Accepted for publication) (ASP Publisher).

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